
Intel debuts their new Prescott core today by launching 4 new CPUs while also scaling legacy architectures. We benchmark them all.
Intel has been promising their new core for a while now and on this Super Bowl Sunday they finally deliver. Intel teases us with four new Prescott cores, a newly clocked Gallatin core, and the final chapter of the Northwood core. We put the 3.2GHz CPUs head to head to head and of course throw in Athlon64s and an AthlonFX-51 in order to find out who is king of the silicon.
Officially, Prescotts in 2.8GHz, 3.0GHz, 3.2GHz, and 3.4GHz clock speeds are being kicked off today.
Intel is also introducing a 3.4GHz Northwood as well as a 3.4GHz Extreme Edition CPU. You will see Prescott core CPUs noted with an "E" in their part number, such as "3.2E" and "3.4E." While we are going to see a socket change in the near future, all of Intel's current CPUs still take advantage of the mPGA-478 package, utilizing the well-known Socket-478. All of our new parts are still using the 800MHz bus and are supported by i865 and i875 chipsets.

(If you see a strained silicon graphic above it is an error and being fixed. Sorry for the issue.)
One of the Prescotts features that will excite the enthusiast is the addition of an expanded Level 2 cache. The Prescott core brings a total of 1MB.

As you can see noted above, by using the latest version of CPUZ, we can learn a lot about our new CPU. Our Prescott core at 90nm or .09 microns is noted as well as our larger cache. L1 Data cache has been doubled as well. If you click on the above image it will take you to a side-by-side comparison of the Northwood 3.2GHz part and the Prescott 3.2GHz part.
As you can see noted on CPUZ, special instructions are extended as well. Intel has added 13 new ones for software programmers to utilize that will be known as SSE3. While we are not going to go into the new SSE3 instructions, video encoding and 3D graphics can benefit from these new instructions.

There are a lot of technical advancements contained within Prescott beyond the ones you will see publicized greatly. For the most part, the part itself is smaller in terms of physical size, but holds many more transistors than the previous generation CPU.

This can be accomplished by using Intel's new "low k" 90nm process. The current Northwood core CPUs use a 130nm process. Intel's 90nm allows for Intel to put more transistors into a smaller area as you can see referenced in the above chart. 90nm also allows seven layers of copper interconnects instead of the previous six layers with Northwood. 193nm lithography is utilized compared to the legacy 248nm. All of the 90nm process is currently using 300mm wafers.
Beyond all of the techno babble, I am sure you have heard the term "Strained Silicon" thrown around on your favorite tech pages. This is a new part of the process in which transistors are made on the new Prescott core CPUs. Here is a quick picture that will give you great insight.

To give you an easy reference on Strained Silicon, just think of force or strain being applied to the silicon in order to pull it apart from itself. This straining of the silicon atoms allows more space to exist in between each atom of silicon. With these spaces, electrons can now travel through the transistor easier allowing for faster signaling.
The Intel NetBurst structure has been tuned up as well as their HyperThreading technology, as explained by the following slide. (We will have a full technical documentation follow-up in the coming weeks for you hardcore tech geeks out there.)

And lastly before we move on to important things like how hot are Prescott CPUs and the performance, we leave you with exactly how the CPU moves data through the pipeline.
